The key to realizing large-scale fault-tolerant quantum computing lies in significantly reducing logical qubit error rates through quantum error correction technologies.
In superconducting quantum computing, the Surface Code has long been regarded as the mainstream approach to fault-tolerant quantum computing because of its hardware-friendly nearest-neighbor coupling requirements. Google is widely recognized as one of the leading pioneers in Surface Code-based quantum error correction. However, the low encoding rate of Surface Codes results in extremely high hardware resource overhead during scaling. As a result, researchers are actively exploring new approaches that can improve error correction performance while significantly reducing hardware costs.
Innovative Chip Design and Fabrication Overcome Engineering Challenges
Despite their theoretical advantages, implementing BB Codes in physical hardware presents significant engineering challenges. Constructing non-local long-range connections on a two-dimensional quantum chip — while simultaneously achieving high-fidelity parallel quantum gate operations across these complex couplings — is substantially more difficult than implementing Surface Codes, which require only nearest-neighbor interactions.
To address these challenges, core members of Logical Qubit Technology participated in the design of the "Kunlun" 32-qubit high-connectivity superconducting quantum chip. Built upon a two-dimensional nearest-neighbor architecture, the chip introduces additional long-range tunable couplers to support the high connectivity and non-local stabilizer measurements required by BB Codes.
To overcome engineering issues such as routing crossovers and parasitic coupling introduced by long-range couplers, the team optimized the chip fabrication process by incorporating air-bridge crossover structures into the long-range couplers. This key process innovation effectively solved the complex topological routing challenges faced by highly connected superconducting chips and provided critical support for achieving high-fidelity parallel control across long-range couplers.

Using the Kunlun quantum processor, the research team experimentally demonstrated two BB Code implementations: the [[18,4,4]] code and the [[18,6,3]] code. The former encodes four logical qubits with distance four using 18 data qubits, while the latter encodes six logical qubits with distance three. By executing efficient non-local stabilizer extraction circuits, the team successfully demonstrated multiple rounds of quantum error correction.

Error-Correctable Quantum Chips Are the Foundation of Universal Quantum Computing
Quantum error correction is an essential step toward realizing large-scale fault-tolerant quantum computing. Today, public understanding of quantum computing is often shaped by the visual impression of quantum computers themselves. However, a complete superconducting quantum computer consists of several critical components, including quantum chips, quantum measurement and control systems, quantum RF systems, as well as quantum software and algorithms.
Among these components, the quantum chip is the indispensable foundation of a quantum computer, while error-correctable quantum chips represent one of the most critical strategic technologies for the future competition toward universal quantum computing.
Developing error-correctable quantum chips is fundamentally a systematic engineering challenge. It not only requires strong chip design and fabrication capabilities, but also demands close integration and coordinated optimization across quantum measurement and control systems, RF technologies, and quantum software platforms.
For this reason, the Logical Qubit Technology team has, from the very beginning, focused on the combined strengths of "technology-driven innovation and engineering capability." Building upon the technical foundation of the Zhejiang University superconducting quantum computing laboratory in chip design and fabrication, the team continues to advance Surface Code-based quantum error correction while simultaneously exploring and validating more efficient next-generation error correction approaches.